Principal ASIC Architect - Photonic AI Processors (f/m/d)

Your mission

Location: Stuttgart, Germany
Type: Full-time, hybrid (1–2 days remote work per week)
Level: Principal / Distinguished Engineer or Architect

Your mission

The future of AI computing is light, not electrons.
Q.ANT is building photonic processing systems that compute with light – delivering a scalable, energy-efficient alternative to transistor-based architectures for next-generation AI and HPC applications.

As Principal ASIC Architect – Photonic AI Processors , you will define the architecture of our digital processor that controls photonic integrated circuits for AI training and inference. Working with a third-party ASIC implementation partner, you'll provide technical leadership to internal photonics, firmware, and system integration teams, translating cutting-edge photonic requirements into a processor architecture optimized for high-bandwidth, low-latency control of our photonic computing platform.

What makes this role unique

• High complexity: Integrating processor architecture with novel photonic device control paradigms – an area with few industry precedents where you'll define how light-based computing is orchestrated at the instruction level.
• Strategic freedom: Broad autonomy in selecting design methodologies, architectural approaches, and IP building blocks, constrained only by high-level product and business goals.
• Decision authority: You define the technical direction for processor architecture, influence make/buy decisions on IP, and approve final architectural trade-offs.
• Innovation mandate: Create novel architectural features that will become differentiating IP for the company – your designs will define how photonic processors operate.
• Real-world impact: Your work directly enables technology already deployed in production at world-leading institutions like the Leibniz Supercomputing Centre.

Your Impact & Responsibilities

Your impact

Within your first 18–24 months, you will:

• Deliver a processor architecture optimized for high-bandwidth, low-latency control of photonic integrated circuits in AI training and inference systems that achieve up to 30x energy efficiency vs. conventional systems.
• Ensure the design meets aggressive performance, power, and integration goals to maintain competitive advantage in the rapidly scaling photonic computing market.
• Optimize architectural trade-offs to reduce implementation cost and time-to-market without compromising performance.
• Achieve first-silicon success through accurate modeling, verification strategy alignment, and close partner collaboration.

Key responsibilities

• Provide technical leadership to internal photonics, firmware, and system integration teams, as well as to the external third-party ASIC/processor design partner.
• Define and manage processor architecture milestones , aligning with overall product roadmaps and photonic IC development timelines.
• Act as the primary technical interface between internal R&D, product management, and the external implementation partner to ensure requirements are fully translated into the processor design.
• Guide less experienced engineers in digital architecture and design principles relevant to photonic systems.
• Identify architecture-level risks early , coordinate mitigation plans, and escalate critical blockers to management.
• Define complete processor architecture specifications within agreed timelines.
• Integrate photonic-specific control features seamlessly into the processor instruction set and memory hierarchy.
• Build up and manage a team for future implementations.

Your profile

Your Profile – our requirements

Education & Experience

• Master's degree or PhD in Electrical Engineering, Computer Engineering, Physics, or related field; equivalent industry experience considered.
• 15+ years of experience in high-performance system design and integration , including processor-based platforms.
• Proven track record of first-pass bring-up success in complex, multi-domain systems.
• 10+ years of experience in processor or SoC architecture definition , with proven first-silicon successes in high-performance, low-latency digital systems.
• Proven track record of leading processor architecture projects from concept to silicon.

Deep technical expertise in

• CPU and/or DSP microarchitecture design (pipelines, instruction set architecture, memory hierarchy).
• High-speed digital interfaces and interconnects.
• Hardware/software co-design principles.
• Low-power and performance optimization techniques.
• Hardware description languages (VHDL, Verilog, SystemVerilog) and architecture modeling tools (SystemC, gem5, or equivalent).
• Familiarity with AI acceleration architectures and associated compute/memory trade-offs.
• Experience working with external ASIC implementation partners or foundries.

Leadership & Coordination Skills

• Exceptional ability to lead multidisciplinary engineering teams across processor design, photonics, firmware, and system integration domains.
• Skilled in resolving cross-domain technical challenges in fast-paced, resource-constrained environments.
• Strong mentoring capability for senior technical staff.
• Excellent communication skills with ability to translate complex technical trade-offs to management, product teams, and external partners.

Preferred Qualifications

• Understanding of photonic integrated circuits (PICs) and their control requirements.
• Knowledge of mixed-signal and analog/digital integration challenges.
• Experience with integrating novel hardware into AI training and inference pipelines.
• Familiarity with domain-specific architectures or accelerators beyond traditional general-purpose processors.
• Experience defining processor architectures for emerging computing paradigms.

Why us?

What We Offer

• Make impact at scale: Help solve one of computing’s biggest challenges—making growing compute demand and sustainability go hand in hand.
• Work on the leading edge: Photonic AI acceleration technologies that will define the next decade of computing, already validated in production HPC environments.
• Own your work from day one: Broad autonomy and decision authority with direct impact on product success and the future of AI infrastructure.
• Fast-track your growth: Work on challenges with few industry precedents—every solution becomes new institutional knowledge and potentially industry-defining IP.
• World-class team: Collaborate with a passionate, international, cross-functional team of experts in photonics, processor design, and AI systems.
• Direct access to leadership: Work closely with the company’s founders, including CEO Dr. Michael Förtsch, and advisory board members who shaped the semiconductor industry (ARM, Intel, Infineon).
• Collaborative culture: Innovative work environment that values technical excellence, open communication, and pragmatic problem-solving.
• Be part of history: Join at the inflection point where photonic computing transitions from research to mainstream—your contributions will shape this transformation.

Why now matters

AI data centers are projected to consume 17% of US electricity by 2030. A single GPU now draws as much power as a kitchen oven. Traditional CMOS processors require 1,200 transistors for a simple 8-bit multiplication—Q.ANT’s photonic chip does it with one optical element.

In July 2025, the Leibniz Supercomputing Centre became the world’s first HPC facility to deploy photonic computing in production. This is no longer research—it’s real, it’s shipping, and it’s redefining what’s possible.

How to Apply

We’re looking for someone energized by the challenge of integrating cutting-edge photonics with high-speed digital systems—and who wants to see their work deployed in production systems already changing how the world computes.

Ready to architect the future of AI computing?
We look forward to receiving your application!

Q.ANT is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.

About us

Who we are and what we do
Q.ANT is a photonic deep-tech scale-up developing photonic processing solutions that compute natively with light and deliver a scalable alternative to transistor-based systems. Its Light Empowered Native Arithmetics (LENA) architecture delivers analog co-processing power optimised for complex computation and enabling energy-efficient performance for next-generation AI and HPC applications. Q.ANT operates its own Thin-Film Lithium Niobate (TFLN) chip pilot line in collaboration with the Institute for Microelectronics Stuttgart, IMS CHIPS, and is currently shipping its Native Processing Servers to selected partners. Q.ANT was founded by Michael Förtsch in 2018 and is headquartered in Stuttgart, Germany.